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Tela introduces new lithography-optimized standard cell librariesfor 32/28nm and 22/20nm processes by grehh hernjer





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Tela introduces new lithography-optimized standard cell librariesfor 32/28nm and 22/20nm processes by
Article Posted: 03/02/2013
Article Views: 128
Articles Written: 1951
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Tela introduces new lithography-optimized standard cell librariesfor 32/28nm and 22/20nm processes


 
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Posted: Jun 4th, 2012 Tela Introduces New Lithography-Optimized Standard Cell Librariesfor 32/28nm and 22/20nm Processes ( Nanowerk News ) Tela Innovations, which provides design solutions to enablecontinued cost-effective scaling of semiconductor manufacturing,today announced the availability of new standard cell librariesoptimized for manufacturing processes of 32/28nm and 22/20nm. Thefoundry-independent libraries leverage Tela's unique proactiveapproach to the design challenges posed by lithography constraintsat 28nm and below. The Tela approach embraces the inherent lithography constraints andresults in designs with simpler, more manufacturable shapes. Thisis in contrast to an ever-increasing set of highly complex, designrule restrictions that attempt to preserve complex layoutstructures from previous generations.

While the popular belief isthat preserving these complex structures is required for areascaling, Tela has demonstrated that this is not the case. From a designer's perspective Tela's approach to layout istransparent, as the libraries contain a complete set of functionsthat provide the ability to implement optimized designs based onall of their specific performance, power and area (PPA)requirements. In addition, the Tela libraries go further andintroduce cell options for routability tradeoffs providingadditional design flexibility. "These new libraries build on our proven expertise in addressingthe unprecedented constraints on design posed by today's mostadvanced manufacturing processes but also exploit the advantages ofthe new technologies such as high-K metal gates (HKMG) and localinterconnects to the maximum extent possible," said Scott Becker,President and CEO of Tela.

"We will continue to combine ourknowledge of standard cell design and customer design flows withour many years of innovations to implement highly manufacturablelibraries that support the entire gamut of modern SoC designtechniques." Comprehensive libraries for advanced nodes The 32/28nm libraries are available in architectures optimized fordensity or speed, and support poly-silicon gate as well as high-Kmetal gate, gate first and gate last, processes. They come with acomplete set of logic and storage elements with multiple circuitvariants, including drive strengths and parametric trade-offs, aswell as specialized cells to implement arithmetic and register filefunctions. The libraries support traditional back-end, physical EDAviews, including GDSII, schematics and circuit simulation. The libraries are capable of supporting Tela's gate length biasingtechnology while maintaining maximum layout pattern uniformity, andalso include support for the full range of Vt's available.

Gatelength biasing techniques provide a significantly better leakagevs. speed trade-off option for designers compared to multi-Vttechniques. For 22/20nm libraries, the absence of a new generation oflithography like EUV introduces new challenges. Printing 20nmfeatures with 193nm light requires new design approachesencompassing not only Restricted Design Rules (RDR) but doublepatterning compatible layout as well. The introduction of doublepatterning for metal layers and local interconnects createsadditional complexities for chip designers.

Tela's layout in its22/20nm library ensures the cleanest pattern splitting, resultingin highly manufacturable patterns on the masks. These librariesalso incorporate innovative circuit and layout design techniques tomaximize the benefit of new process features such as localinterconnect, resulting in a superior cell library. These new libraries are available now from Tela. Due to the moresimplified architecture of these libraries they can also be quicklycustomized to specific customer requirements. For more informationabout these libraries, please visit our web site atwww.tela-inc.com/physical-ip/ or feel free to contact us directlythrough our web site.

About Tela Tela Innovations is a privately-held company based in Los Gatos,California that provides solutions addressing the challenge ofscaling semiconductor design and manufacturing to advanced processnodes. Tela was founded in 2005 by a team of experts insemiconductor IP, design automation and process technology, and isbacked by a number of venture firms and corporate investors,including Intel Capital, Cadence Design Systems, KT Venture Group,LLC, the investment partner of KLA-Tencor Corporation, and QualcommIncorporated. For more information on the company visitwww.tela-inc.com.

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