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1 Introduction IEEE1394 is a high-speed serial bus, it first from Apple, the mid-20th century, the development of 80 FireWire bus. 1995, IEEE formulated and promulgated the IEEE1394-1995 standard, and in 2000 launched the IEEE1394a standard, can support 100Mbps, 200Mbps and 400Mbps transfer rate. In the latest IEEE1394B standards to support data rates up to a 800Mbps, 1.6Gbps and 3.2Gbps. IEEE1394 bus, the characteristics of its high transfer rate has been in the video transmission, networking and computer peripherals and other fields has been widely used [1]. Present in the air [2] and aerospace applications, a large number of high-speed real-time transmission of data requirements continue to increase, IEEE1394 with high speed data transfer, support for isochronous transmission characteristics, and thus become the on-board data bus, one of the options. In spaceborne applications, due to the diversity of tasks, on-board bus interface needs of a wide range. For example, part of the load itself does not integrated 1394 interface is needed to transmit data bus 1394; or several loads need to share a 1394 bus interface; or the load itself did not bring a micro-controller control unit. And a variety of loading external data interface is varied. At this time, we need a small, simple and easy to expand the interface to the intelligent terminal with the load can work together. IEEE1394 bus protocol as more complex, most of the practical application of 1394 by a dedicated bus Chip , 1394 for the special system support the microprocessor interface chip. Common design uses a 1394 bus 1394 bus microprocessor with chips and peripheral logic chips, such design requires more than the number of chips, interface devices are bulky, the expansion interface functions to achieve them more complicated. IEEE1394 board for the actual needs of the application, the paper MC8051-based soft-core, a simple, low power, compact and easy to extend the IEEE1394 terminal design intelligent programs to overcome the past, the 1394 bus interface hardware circuit complexity, the use chip, size and other defects, and interfaces can be easily extended to other functions. 2 system implementation Block diagram of the interface system 1934 shown in Figure 1. Actel Corporation is adopted based on FLASH technology ProAS IC Plus family of FPGA chips APA600. It has a single-chip power-up, high performance and low power consumption [2]. As the power is used, reduced Board Volume, helps simplify circuit design. Used in the experiments in the program is TI's link layer chip TSB12LV32 [3] and the physical layer chip TSB41AB [4]. TSB12LV32 is a high-performance general-purpose IEEE1394a Link Layer chips, used in the main controller and the 1394 physical layer chip and connect to the DM port link layer data transmission between the external device. It is compatible with IEEE1394-1995 and P1394a standards in support of 400,200 and the 100Mbps transfer rate. Optional with a variety of operating modes of the 8-bit / 16-bit micro-controller interface, maximum support 60MHz. Chip are built-in common interface 2K byte transmit FIFO and asynchronous FIFO, for the micro-controller interface and physical layer interface between the packet transmission, 8-bit / 16-bit data port supports 25MHZ under Mobile, etc. , asynchronous, and data streams to send and receive packets. TSB41AB3 is a three-port compatible with IEEE1394-1995 and P1394a standard 400Mbps physical layer chip. In the FPGA to integrate the open source standard 8051-compatible microcontroller IP core MC8051, the program memory, program memory, external data memory and the UART and timer are integrated in a FPGA. Mission requirements can be easily customized within the FPGA interface and other required logic cells, such as AD / DA control, CAN bus, etc.. Through the three parts can constitute a complete application for a particular bus interface system 1394. 3.1 Oregano Systems MC8051 IP Core ¬ [5] Oregano Systems has released the MC8051 IP Core is an open source based GUNLGPL IPCore. It is fully compatible with the standard 8051 controller, and its architecture has been improved, in the case of using the same clock frequency, the instruction execution time down to 1 to 4 clock cycles, so speed is 10 times the upgrading of and reduce power consumption. MC8051 model is synthesizable RTL style, fully synchronous design with single clock network, by adjusting and modifying VHDL code can easily extend its functionality. Chip with 128 bytes of RAM, supports up to 64K of ROM and RAM, and integrated UART, timers, interrupts, and 4 group of 8-bit I / O port. 3.2 MC8051 design points The e-commerce company in China offers quality products such as Portable GPS Tracking Device , Shark Fin Antenna, and more. For more , please visit GPS Active Antenna today!
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